FPU status word

[SteveAsm]

Hey guys,
I've been doing some experimenting, trying to determine what jump instructions work (sucessfully) based on storing the fpu status word in the AX register.
As in:

Code Select Expand


  FLD avalue
  FLD bvalue
  FCOM
  FSTSW AX
  FWAIT
  SAHF
;     <------- some jump instruction here  ----->  jne, jnl, jng, jnle, jz, je, jl, jg, jle, jge, jnz, ...etc.



Testing leads to a lot of hair pulling..., when some things appear to work, under some circumstances, but, then dont under others.
I've searched the forum archives and done some googling, but, I'm not finding too much information.
Any ideas or pointers would be appreciated.
Thanks,
steve

[dedndave]

2 things will come in handy

1) Ray's FPU tutorial
http://www.ray.masmcode.com/fpu.html
specifically...
http://www.ray.masmcode.com/tutorial/fpuchap7.htm

2) a table that shows which flags the conditional branch instructions test
http://www.arl.wustl.edu/~lockwood/class/cs306/books/artofasm/Chapter_6/CH06-5.html#HEADING5-226

[SteveAsm]

2 things will come in handy

Thanks Dave

[qWord]

you may better use fcomi[p], which directly set the flags -> JA/JB/...

[SteveAsm]

you may better use fcomi[p], which directly set the flags -> JA/JB/...

Hey qWord,
thanks for pointing that (FCOMI) out.
I didn't catch that in my searches the first time around and my reference book does not include it.

It looks like that could solve the problem, IF most processors in use include it.
I'm not so concerned with the newer ones.
It's the older desktops, laptops and notebooks I wonder about.

[qWord]

FCOMI was introduced with Intle's P6 (1995)  - don't worry about availability  :bg

[SteveAsm]

Okay..., this is really odd.
I get these similar errors from JWasm and Masm:

JWasm  ::  Test2.asm(111) : Error A2049: Invalid instruction operands.

Masm :: Test2.asm(111) : error A2085: instruction or register not accepted in current CPU mode.

from this code segment:

Code Select Expand


  FILD aa
  FILD cc
  FCOMI
  jng  Label



Line #111 is the FCOMI instruction.
I have tried:
FCOMI ST(1)
FCOMI ST(0), ST(1)

Any ideas what this is all about ?

[jj2007]

Masm :: Test2.asm(111) : error A2085: instruction or register not accepted in current CPU mode.

include \masm32\include\masm32rt.inc
.686

[dedndave]

also, FILD will only work with words, dwords, or qwords
you may need to use a size override operator

Code Select Expand

SomeStuff db 0,0,0,0,0,0,0,80h
;
;
       FILD qword ptr SomeStuff

[jj2007]

also, FILD will only work with words, dwords, or qwords

FILD will should only work with words, dwords, or qwords

Code Select Expand

include \masm32\include\masm32rt.inc

.code
SomeStuff dq 1234567

start:
       FLD qword ptr SomeStuff  ; try FILD
       push eax
       fistp dword ptr [esp]
       pop eax
       print str$(eax)
       exit

end start


Of course, the result is gibberish :bg

[SteveAsm]

include \masm32\include\masm32rt.inc
.686

Aha!
.686
this is the key.
Nowhere in my search results was that illustrated.

I had tried everything but .686 .

Thanks for that JJ,
Thanks once again guys.

[raymond]

.686
this is the key.
Nowhere in my search results was that illustrated.

If you had looked at the first link given to you by dedndave, you would have found this:

Note: This instruction is valid only for the Pentium Pro and subsequent processors. It may not be supported by some assemblers (for MASM, the .686 directive must be used).

[SteveAsm]

If you had looked at the first link given to you by dedndave, you would have found this:

Note: This instruction is valid only for the Pentium Pro and subsequent processors. It may not be supported by some assemblers (for MASM, the .686 directive must be used).

I don't want to appear antagonsitic, Ray, but I did look at Dave's first link.
There is a lot of information there, and I simply missed the Note.

[SteveAsm]

After spending the entire afternoon and evening playing with FCOMI, it doesn't appear that it solves any problems.
It eliminates a few steps, but, the result is still the same.
You are still limited to only a few branching options, as most of the x86 branch instruction are unusable.

[qWord]

You are still limited to only a few branching options, as most of the x86 branch instruction are unusable.

Which instructions are unusable?