Addressing mode question

[dicky96]

I did a search here for info about addressing modes and found a useful link to Randall Hyde "AoA" which tells me      

There are a total of 17 different legal memory addressing modes on the 8086: disp, [bx], [bp], [si], [di], disp[bx], disp[bp], disp[si], disp[di], [bx][si], [bx][di], [bp][si], [bp][di], disp[bx][si], disp [bx][di], disp[bp][si], and disp[bp][di].

Which is fair enough, but now I discovered to my suprise (by trying it) that MASM let's me do nice things like this

mov al, byte ptr [2*ebp+edi]

mov al, byte ptr [4*ebp+edi]

Though I can't do
mov al, byte ptr [3*ebp+edi]

Why can I do this kind of addressing when AoA did not mention it, and what is it doing to the value in ebp, does it change or is it just multiplied in some sort of temporary register while the address is calculated or is MASM just generating some extra code that achieves this?

Can I do this with other registers?

TIA
dicky

[dicky96]

Wow now I found I can do things like       

mov al, byte ptr [2*ebx+edi+1]      :U

What else can I do that was not mentioned?   

[hutch--]

Dicky,

You will find the complex addressing modes very useful and flexible once you know how they work. As long as the components between the square brackets amount to a combination of base address, index, scale and displacement, array and memory addressing is slick fast and efficient.

[daydreamer]

Wow now I found I can do things like       

mov al, byte ptr [2*ebx+edi+1]      :U

What else can I do that was not mentioned?   

the AoA you read is probably 16bit real mode, which is limited to indirect with  Base reg(bx or bp) combined with index reg(di or si)+constant and no scaling
you can scale 2* 4* 8* and combine any regs you like even [eax] can be used to indirect, because you are now programming in 32bit protected mode

[Ratch]

dicky96,

     Byte addressing is explained nicely in the INTEL manuals as 8A /r r8/r/m8 .  You can use 1,2,4,8 as a index multiplier.  3 is not a valid index value.  You can use any of the general registers including ESP as the base register, and any of the general registers for the index register, except ESP.  Ratch

[pro3carp3]

You will find a clear and concise explenation of the addressing modes in the IA-32 Intel Architecture Software Developer's Manual Vol. 1: Basic Arhitecture on pages 70 and 71 which is available here:

http://www.intel.com/design/pentium4/manuals/index_new.htm

[dicky96]

Thanks for the help  :8)

[V Coder]

Wow now I found I can do things like       

mov al, byte ptr [2*ebx+edi+1]      :U

What else can I do that was not mentioned?   

the AoA you read is probably 16bit real mode, which is limited to indirect with  Base reg(bx or bp) combined with index reg(di or si)+constant and no scaling
you can scale 2* 4* 8* and combine any regs you like even [eax] can be used to indirect, because you are now programming in 32bit protected mode

32 bit assembly programming allows all those addressing modes. The new AoA explains this and several other things.

The new AoA and the associated HLA assembler can be obtained in the HLA Forum page linked from the main page under Project Support Forums.