Information about the registers & POP reg32 please, thanks :-)

[n00b!]

Hey,
I searched in the Net for information about the registers, but I never found some explicit details about for what they are (only their general tasks).
I just know the ones below (but I even don't know, if they're correct...):

Code Select Expand

EAX - Commonly used & the return value of procs is saved in it
ECX - Commonly used (often for loops)
EDX - ? [changes often (after calling some API Functions) its value]
EBX - ?
ESP - Always points to the top of the room of the stack, which is used
EBP - Is used to make a stack frame for local variables in a procedure. Points to the lower bound of the used part
(which contains the previous value of EBP [Is it ever 0012FFF0?])
ESI - ?
EDI - ?
EIP - Contains the address of the current instruction
----

                                      Clocks                 Size
Operands         808x  286   386   486          Bytes
reg16               8       5       4       4             1
reg32               4       -        -       4             1
...

How many Cycles does a pop need [see above; Clocks at 386: -]?
I want to know, because I'm wondering if a LEAVE is better than mov esp, ebp and pop ebp.
The specifications of LEAVE are as followed:

Code Select Expand

LEAVE
Clocks: 4
Size: 1
of the other it should be like that:

Code Select Expand

MOV reg, reg
Clocks: 2
Size: 2

POP reg32
Clocks: -
Size: 1
-> So what it better to use: LEAVE or the manual way?
Thanks!

[Mark Jones]

About registers, see: \masm32\help\asmintro.chm

Timings are not given for pentium and higher, because the various hardware caches and optimizations make each particular family of processor different, as well as the particular contents of each cache at run-time. Thus, no single value can be determined.

The best way to tell if one piece of code works faster than another, is to time both, and compare the results. Search here for timers.asm, proctimers.asm, and similar. Petzold and MichaelW have both made some clock-accurate timing macros which are easy to use.

Keep in mind, that something which runs faster on your particular CPU and chipset, may be VERY slow on another chipset. Once you have a few pieces of code being timed, try it on another PC or post the code in the Workshop or Laboratory forums here for others to try.

[MichaelW]

The clock cycle listings were included in the Intel manuals for the first Pentium. I know that they were not included for the Pentium 4, but I'm not sure where in between they were dropped. At one point I did a comparison of the assumptions that the clock cycle listings depended on, for all of the manuals I had from the 8086/8088 to the first Pentium. I can't find that comparison, but I recall that the trend was for the number of assumptions to increase significantly for each generation of processors. For example, here are the assumptions for the 386:

The instruction has been prefetched and is ready for execution.

Bus cycles do not require wait states.

There are no local bus HOLD requests delaying processor access to the bus.

No exceptions are detected during instruction execution.

Memory operands are aligned.


And here are the assumptions for the 486:

Data and instruction accesses hit in the cache.

The target of a jump instruction is in the cache.

No invalidate cycles contend with the instruction for use of the cache.

Page translation hits in the TLB.

Memory operands are aligned.

Effective address calculations use one base register and no index register, and the base register is not the destination register of the preceding instruction.

Displacement and immediate are not used together.

No exceptions are detected during execution.

There are no write-buffer delays.