Size of data accessed @ address determined by size of register used 2 receive it

[bolzano_1989]

Could you explain this statement (in Addressing and Pointers section) from asmintro.chm of masm32 to me :bg :"The size of the data accessed at the address is determined by the size of the register used to receive it." ?

In the following example of asmintro.chm:

Code Select Expand

mov eax, lpvar    ; copy address into eax
mov eax, [eax]    ; dereference it
mov nuvar, eax    ; copy eax into new variable
Which register here is called "the register used to receive it", the one in eax or the one in [eax] ?

[dedndave]

the statement applies to each line of code, individually

Code Select Expand

mov eax, lpvar    ; copy address into eax
mov eax, [eax]    ; dereference it
mov nuvar, eax    ; copy eax into new variable

for the first line, the register is a dword, so a dword from the address labeled "lpvar" will be loaded into EAX

for the second line, the register is a dword, so a dword from the address pointed to by [EAX] will be loaded into EAX
(they are refering to the EAX, not the [EAX] for the size statement)
before the instruction, EAX holds an address, afterward, EAX holds the data from that address
now, that data may be another address   :P

for the third line, the register is a dword, so a dword from EAX will be written to the address labeled "nuvar"

let's look at a couple more...

Code Select Expand

mov ax, [eax]
mov al, [eax]

notice that the address is always a dword in 32-bit code

for the first line, the register is a word, so a word from the address pointed to by [EAX] will be loaded into AX

for the second line, the register is a byte, so a byte from the address pointed to by [EAX] will be loaded into AL

[lingo]

Let's the address of the variable(var) in memory,  lpvar is equal to 400112h.
After  mov eax,  lpvar -> register eax will be ==  400112h
Let see 8 bytes (2 dwords) of the memory from address 400112h:

400112h 400113h 400114h 400115h 400116h 400117h 400118h 400119h
     08        02           06          04          03        0Ah         0Fh       01

After  mov eax, [eax] -> register eax will be == mov eax,[ 400112h] (means load register eax with the double word from the address  400112h ;   [eax] means get the value from the address in eax) so,    mov eax,[ eax] == mov eax, [400112h] ==  eax == 04060208h

We can continue with mov eax,[eax+4]  -> mov eax, [400112h + 4]== mov eax, [400116h] = eax==010F0A03h

[bolzano_1989]

Thank you, dedndave.

Let's the address of the variable(var) in memory,  lpvar is equal to 400112h.
After  mov eax,  lpvar -> register eax will be ==  400112h
Let see 8 bytes (2 dwords) of the memory from address 400112h:

400112h 400113h 400114h 400115h 400116h 400117h 400118h 400119h
     08        02           06          04          03        0Ah         0Fh       01

After  mov eax, [eax] -> register eax will be == mov eax,[ 400112h] (means load register eax with the double word from the address  400112h ;   [eax] means get the value from the address in eax) so,    mov eax,[ eax] == mov eax, [400112h] ==  eax == 04060208h

We can continue with mov eax,[eax+4]  -> mov eax, [400112h + 4]== mov eax, [400116h] = eax==010F0A03h

Could you tell me why the result of mov eax,[ eax] == mov eax, [400112h] ==  eax is not 08020604h
and the result of mov eax,[eax+4]  -> mov eax, [400112h + 4]== mov eax, [400116h] = eax is not 030A0F01h ?

[dedndave]

intel processors store data in "little-endian" form
the low-order bytes are stored at lower addresses

http://en.wikipedia.org/wiki/Endianness

[bolzano_1989]

Thank you dedndave for your explanation and lingo for your example :bg .