Global Descriptor Table
Base: 8003F000 Limit: 000003FF
Base — Segment base address
Limit — Segment Limit
DPL — Descriptor privilege level
P — Segment present
G — Granularity
-------------------------------------------------------------------------------
Sel. Base Limit DPL P G Description
-------------------------------------------------------------------------------
0008 00000000 FFFFFFFF 0 P 4Kb Execute/Read, accessed
0010 00000000 FFFFFFFF 0 P 4Kb Read/Write, accessed
0018 00000000 FFFFFFFF 3 P 4Kb Execute/Read, accessed
0020 00000000 FFFFFFFF 3 P 4Kb Read/Write, accessed
0028 80042000 000020AB 0 P 1b 32-Bit TSS (Busy)
********************************************************************
Look at GDTs Base . It must be a physical addressi, is it right ?
i have only 256MB RAM but this gdt base is above 2GB
how could it be ? ? ?
Page translation I guess.
Page translation needs valid segment descriptors..
The segment descriptors are valid. You need to take a look at the page tables too.
hmmm...
is gdt base a Linear address ???
(http://criminal2.hypermart.net/pg.JPG)
It is a linear address (translated via page tables). Quote from the Intel Instruction Set Manual:
(LGDT LIDT) are the only instructions that directly load a linear address (that is, not a segment relative address) and a limit in protected mode.
I would assume this means a segment base value of 0 is used.
thank you
Hello,
GetThreadSelectorEntry can be used instead of LDT GDT to obtain the same result.
ToutEnMasm