This example is a worst case for a PIV, WORD then BYTE reads on a 32 bit register that has just been written to with a 32 bit integer. Followed by writes to high and low byte of the same register. The Core processor easily outperforms the PIV in this case.
Core quad
797 Partial register stall test
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PIV
1062 Partial register stall test
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The test code.
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include \masm32\include\masm32rt.inc
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comment * -----------------------------------------------------
Build this template with
"CONSOLE ASSEMBLE AND LINK"
----------------------------------------------------- *
.code
start:
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call main
inkey
exit
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main proc
push ebx
push esi
push edi
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mov esi, 1000000000
invoke GetTickCount
push eax
@@:
mov eax, 12345678
mov dx, ax
mov bx, ax
mov ch, al
mov cl, ah
sub esi, 1
jnz @B
invoke GetTickCount
pop ecx
sub eax, ecx
print str$(eax)," Partial register stall test",13,10
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pop edi
pop esi
pop ebx
ret
main endp
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