Need clarification on an addressing mode in certain situations

[Rainstorm]

hi, I'll just give an example to show what i wanna ask

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    mov esi, pointervar                ; contains a pointer
    mov byte ptr [esi+fsize+1], 0      ; fsize is some other var
                                         (not a pointer)


how does masm handle stuff in [  & ] brackets
- does it take the first item in the square brackets & uses that as the memory address location
    then adds the rest of the following items like displacements..to the first
    item (esi in this case)& arrive at a final address to denote the byte .
                       OR
  if a variable is present in the square brackets (pointervar inthis case) then it uses the address of the
   var to denote that point in memory.. & then add the rest of the stuff in square brackets to that
   var address & arrive at a resulting byte offset from the variable

& suppose there is no variable, like..

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mov [edi+ecx+5] then i suppose it uses the first item in the square brackets edi in this case & treats it as the pointer to the byte - is this right ?

Thanks,

Rainstorm

[Jimg]

It really doesn't matter.  The assembler computes everything it can at assembly time, then, if what's left over constitutes a valid combination of registers for the addressing mode, it does it, else, error.

e.g.
local txpos
mov eax,[1000*55-5500+txpos+14+36-88*45+edx]

will create the command

mov eax,dword ptr [edx+ebp+b212]

There may be times when Masm can't figure it out, but that's just a bug in Masm, and you have to simplify a bit.

[NightWare]

It really doesn't matter.

jimg,
it really does, you're right when you say that masm reduce the expression to the minimum, but it's essential to keep in mind the mem access rules... read lea instruction variants in agner fog's instructions table, it works the same way for every instructions that can access mem, so it's essential (for a question of speed) to not use more than [r+r/i] when it's possible... it's why "monster" algo using [r*i+r+i] are generally slow...

so, mov byte ptr [esi+fsize+1],0 it's ok coz it will be reduced to [r+i]. but mov byte ptr [edi+ecx+5],0 is slower coz it's [r+r+i] (1 clock cycle more)...

[Rainstorm]

jimq & nghtware thanks for the info & feedback...

what about these 2 pieces of code.. are they equivalent or diff ?

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      mov esi, pfbuff                      ; pointer to buff
      mov byte ptr [esi+flen+1], 0         ; add a NULL at the eof in the buffer


                         AND

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       mov esi, pfbuff
       add esi, flen
       mov byte ptr [esi+1], 0


[NightWare]

 ::) flen is a value at an address, and not an address, so it will not work correctly...

mov esi,flen
mov byte ptr [esi+fbuff+1],0

should work, but not with pfbuff (coz here it's an address at an address...)

[] are used to tell the assembler to use the offset (address) of the variables (and not the variables)

[Rainstorm]

Nightware wrote,..

[] are used to tell the assembler to use the offset (address) of the variables (and not the variables)

..& return the value at that particular offset in the variable. - I got a bit confused there. - in my mind i was somehow thinking that maybe if the first item in the brackets was a register then it would take the value of the variable if it was present in the brackets..& that was part of what i asked in the first post

as for the variable,.. even without brackets it will use the address & return the value of the contents at that particular offset in any case.

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       arrayy   db      1,2,3,4,5,6,7,8
       movzx ebx, byte ptr arrayy+5           ;  both these are the
       movzx ebx, byte ptr [arrayy+5]        ;  same ....return 6


but i get what you mean. the variable would have to contain an address to be used there, in this case.
i got a faint deja vu feeling about this whole thing.
..Appreciate the quick reply, thanks for clearing that up.

-

[NightWare]

but i get what you mean. the variable would have to contain an address to be used there

no... there is a little misunderstanding here... i'm going to clearly explain... or try to... in your example "movzx ebx, byte ptr arrayy+5" you copy the byte at offset array+6 in bl and fill the rest of ebx with 0...
why 6 ? coz byte ptr = +1, word ptr = +2, dword ptr =+4, etc... so in the right part of the instruction you don't READ the byte, you just define the location where the byte is... so :

arrayy = location of the arrayy label in memory (the OFFSET),
then you add 1 (byte ptr) coz you're gonna read a byte (OFFSET arrayy+1),
and to finish you add 5 (OFFSET arrayy+6). here the location is defined,
and it's only when it's defined that the instruction going to read the byte and put it in bl...

now... try to do the same thing with your previous code, and you will certainly understand why it can't work  :wink

edit :

coz byte ptr = +1, word ptr = +2, dword ptr =+4, etc...

it's not true, i've thought it's used and subtract later the size of the register used, but in fact the value is symply ignored by masm for the location, it's only used to validate the size when specified, otherwise it's automatically defined by the compiler. i should think, just a bit, before post...  :'(

[Rainstorm]

Nightware wrote

no... there is a little misunderstanding here...

the example i gave in the last post, was just on how the brackets don't make a diff for the variable
used alone....... & wasn't supposed to be a substitute for my original code. maybe we are just misunderstanding each others words : )
what i meant was the variable being used in a manner not expecting the value inside the brackets..(which was my initial error) but rather expecting the address of the variable to be used inside the brackets by the assembler along with the other values to arrive at a particular number. whose contents would then be displayed

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mov ecx, 4
mov eax, [var+ecx]

thx

[hutch--]

Rainstorm, just use the extra register for the complex addressing mode. The way an OFFSET can be used is with one particular Intel opcode that is in this form,

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mov reg, [OFFSET+reg*scale]
mov eax, [dataoffset+edx*4]