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unreal mode

Started by dileep, February 27, 2012, 11:02:04 AM

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sinsi

Yes, that will give you the linear address.

Re the A20 line, using port 92h is usually considered the last resort. My order is BIOS, if that doesn't work then the KBC, if that also doesn't work then try 92.
Light travels faster than sound, that's why some people seem bright until you hear them.

dileep

I tried after setting the  linear address . But the result  is same.

sinsi

If you are still using this, it is wrong

gdtr_base label     fword
    dw LPCFG_GDT_LENGTH

gdt_limit           dw  gdt_end-gdt_start-1 ;limit
gdt_addr            dd  00000000h  ; 32 bit address (filled in above)

Correct

gdtr_base label     fword
gdt_limit           dw  gdt_end-gdt_start-1 ;limit
gdt_addr            dd  00000000h  ; 32 bit address (filled in above)

Light travels faster than sound, that's why some people seem bright until you hear them.

dileep

i am using the correct one

gdtr_base label     fword
gdt_limit           dw  gdt_end-gdt_start-1 ;limit
gdt_addr            dd  00000000h  ; 32 bit address (filled in above)

---------

and then i set gdt_addr to the linear address of gdt_start

sinsi

There is not enough information to know what is going on.
1. How are you testing this code?
2. How do you know the instruction causing the fault?
Light travels faster than sound, that's why some people seem bright until you hear them.

dileep

we will flash this ROM image onto our PCI network card and put this card into IBM , Dell Servers.  this driver is for pxe booting. While system is coming up , will load our driver. I added some debug prints , so i can see execution flow.    Once the initialization is done, we have to load UNDI driver,  for  that  i have to swith to unreal mode for accessing the 32bit pci BAR address.

i am able to read the CR0 register.  got the CR0 value 0x12 ,. While enabling the PE bit system reboots.

sinsi

That is way above what we seem to be doing here. Setting a segment register for 4GB access is a trivial thing.
Light travels faster than sound, that's why some people seem bright until you hear them.

dileep

#22
If i use this ,On Dell also i was not able to enter unreal mode

gdtr_base label     fword
gdt_limit           dw  gdt_end-gdt_start-1 ;limit
gdt_addr            dd  00000000h  ; 32 bit address (filled in above)


dileep

what will happen internally if i set the PE bit in CR0? Can any one help me in this?

Tedd

All the information you require is in the Intel Manuals, specifically the Systems Programming Manual.

Read it.
Read it again.
If you have any further questions, you might get better help at http://forum.osdev.org/; but be warned, they won't have much patience for you if you haven't read and understood the basics.
No snowflake in an avalanche feels responsible.

dedndave

lol - they're not the friendliest guys in the world, are they

i don't usually ask questions in there
i just read all the posts that are relevant to what i want to know
there is a lot of good code posted in there - and some bad, too