What processor model directive represents the latest instruction set?

Started by Victor Stout, December 31, 2010, 06:26:37 AM

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Victor Stout

There are five overall: 386, 387, 486, 586 and 686. Of course it seems like 686 is the answer by looking at the numbers alone but considering my poor knowledge at this moment of what goes beyond those numbers it might be wrong assumption. So which one of them is backward compatible with all others and is the newest? Thanks.

dedndave

.686p is another one

use the one you need, usually

newer revisions of SSE may require .686

some instructions, like CPUID, require at least .586

i see .386 once in a while - that is a bad plan, i think
because 486+ CPU's have near-distance conditional branches and allow more register addressing modes, as well as some additional instructions

for most code, .486 or .586 are probably good choices
nearly everyone has at least a pentium, nowdays

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japheth

Quote from: dedndave on December 31, 2010, 06:48:24 AM
i see .386 once in a while - that is a bad plan, i think
because 486+ CPU's have near-distance conditional branches and allow more register addressing modes, as well as some additional instructions

No. All of the things mentioned are supported by the 386 already. The main new feature for the 486 was the integrated FPU.

The .XMM enables SSE generally ( SSE1, SSE2, SSE3, ... ), so there are no cpu directives which enable exactly the instruction set of, say, the P4.


dedndave

while they may be supported by the CPU, the MASM assembler may not recognize them
i was wrong about the near conditionals and register-addressing modes - those were new for 386 processors
however, i know that CPUID requires a .586 directive or better under MASM, even though it was introduced on later 486 CPU's
i believe the same is true of RDTSC
as you mentioned, if you use .386 and want to use FPU instructions, you must also use .387
and, i seem to recall that the 486 processor added some FPU instructions
MMX instructions were intorduced on pentiums, but i am not exactly sure how MASM handles them
i still say it is not good to use .386, unless you are writing code specifically for a 386-level embedded controller

donkey

The 386SX and a few other 386 variants did not support 32 bit physical addresses. I believe RDTSC could only be executed from protected mode on the 486DX or newer.
"Ahhh, what an awful dream. Ones and zeroes everywhere...[shudder] and I thought I saw a two." -- Bender
"It was just a dream, Bender. There's no such thing as two". -- Fry
-- Futurama

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dedndave

the MASM directives act like a switch that allow you to use a certain set of instructions

i guess the point i wanted to make was this....
the MASM switches don't always coincide with the instructions allowed by the CPU's - lol

Victor Stout

Haven't logged in for a while. Thanks everybody for the answers and happy new year.